Réalisations 2018-2019 et Perspectives 2019 : ICI
Memories are key components of a processor module. This workshop aims at giving an overview of the current and future trends regarding these components.
Memories sizing in a processing board is a real challenge facing a space computer designer. CNES perspective on this subject will be presented.
Some subjects regarding memories are specific to space application : SEU mitigation, data retention time of the boot code, reliability...These subjets will be handled through the presentation of radiation and reliability test results.
Techical innovations such as DDR3 or MRAM are providing new solutions for the space computer designers. Recent Feedback on these technologies from space designers will be presented.
Memory access contention due to the introduction of multi-core processors in space applications is a new challenge facing space computer enginneers. A feedback about this issue will be presented too.
Preliminary Agenda.
Preliminary Program.
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